Atlas / MCP servers / oaslananka / kicad-mcp-pro

kicad-mcp-proCAUTION

Name: kicad-mcp-pro
Author: oaslananka

mcp/oaslananka/kicad-mcp-pro

MCP server by oaslananka · ai agent · bom · claude · Audited 2026-10-01

MCP server for KiCad, connecting AI agents to schematic and PCB workflows, ERC/DRC validation, DFM checks, BOM analysis, and manufacturing preparation—with controlled edits and human-gated release workflows.

Verdict

CAUTION

Grade

Trust score

65 /100

Exposed tools

94 56r · 30w · 8d

Transport

sse · stdio · streamable-http

License

MIT

Stars

114

Overview

From the repository's own README, as read at the audited commit. Badges and raw HTML are left out.

KiCad MCP Pro

Drive KiCad schematic, PCB, DRC/ERC, DFM, and manufacturing review from any MCP-capable AI agent.

Documentation · Installation · Quick Start · Tool Reference · AI Agent Setup · AI discovery

Read from source at commit 627d3461a6b1OBSERVED · 2026-10-01

Connect

Built from this server's own package name, version and transport as found in its source — not copied from anyone's documentation, so it cannot drift against a page we do not control. Replace the environment placeholders with a token scoped to the least it needs.

claude-code (pypi)

claude mcp add kicad-mcp-pro -- uvx kicad-mcp-pro==3.35.2

claude-code (npm)

claude mcp add kicad-mcp-pro -- npx -y [email protected]

claude-code (oci)

claude mcp add kicad-mcp-pro:3.35.2 -- docker run -i --rm ghcr.io/oaslananka/kicad-mcp-pro:3.35.2:None

Exposed tools (94)

56 read · 30 write · 8 destructive. Blast radius: 8 tools can delete or overwrite — an agent that can be talked into calling a tool can be talked into calling this one.

Tool	Risk	Description
`allowed_tool`	read	return
`analyze_uploaded_kicad_project`	read
`check_power_integrity`	destructive	Run a lightweight PDN mesh voltage-drop check for a power net.
`emc_check_decoupling_placement`	read	Review whether ICs have nearby decoupling capacitors.
`emc_check_differential_pair_symmetry`	read	Review diff-pair skew and width symmetry.
`emc_check_ground_plane_voids`	read	Review GND plane presence and a simple void-risk proxy.
`emc_check_high_speed_routing_rules`	read	Review a high-speed net class for a short-stub proxy.
`emc_check_return_path_continuity`	read	Check EMC return-path continuity for a signal or all critical high-speed nets.
`emc_check_split_plane_crossing`	read	Warn when routed signals share layers with split non-ground planes.
`emc_check_via_stitching`	read	Estimate via-stitching density from existing ground vias.
`emc_run_full_compliance`	write	Run a lightweight EMC sweep with at least ten heuristic checks.
`explain_drc_report`	read
`explain_erc_report`	read
`generate_agent_config`	read
`generate_manufacturing_readiness_report`	read
`hidden_tool`	read	nonlocal hidden_called
`kicad_capability_parity`	read	Report how much of KiCad
`kicad_get_tools_in_category`	read	Get tool names in a category, optionally filtered by maturity.
`kicad_get_version`	read	return
`kicad_list_tool_categories`	read	List all available tool categories and capabilities.
`pcb_add_blind_via`	write	Add a blind or buried via between the requested copper layers.
`pcb_add_circle`	write	Add a board graphic circle.
`pcb_add_microvia`	write	Add a microvia between adjacent copper layers.
`pcb_add_rectangle`	write	Add a board graphic rectangle.
`pcb_add_segment`	write	Add a board graphic segment.
`pcb_add_text`	write	Add board text.
`pcb_add_track`	write	nonlocal called
`pcb_add_tracks_bulk`	write	Add multiple tracks in a single operation.
`pcb_get_live_edit_state`	write	Return sanitized native-live PCB transaction state as deterministic JSON.
`pcb_highlight_net`	read	Attempt to highlight a net in the GUI when supported.
`pcb_refill_zones`	read	Refill all copper zones.
`pcb_save`	write	Save the active board.
`pcb_set_board_outline`	write	Draw a rectangular board outline on Edge.Cuts.
`pcb_set_net_class`	write	Assign a net class when the runtime supports it.
`pdn_calculate_voltage_drop`	destructive	Estimate DC voltage drop, trace resistance, and IPC-2221 current-density fusing.
`pdn_check_copper_weight`	read	Check whether the routed copper for a net looks sufficient for the load current.
`pdn_generate_power_plane`	read	Generate a rectangular copper plane on the requested copper layer.
`pdn_recommend_decoupling_caps`	read	Recommend local and bulk decoupling from a simple PDN heuristic.
`reference_compare_manufacturing_snapshots`	read	Compare the two fixed manufacturing snapshot manifests after byte revalidation.
`reference_generate_manufacturing_snapshot`	read	Generate one of two fixed fresh manufacturing snapshots for benchmark evidence.
`sch_add_bus`	write	Add a schematic bus, snapping endpoints to the 1.27 mm / 50 mil grid by default.
`sch_add_bus_wire_entry`	write	Add a bus wire entry marker.
`sch_add_global_label`	write	Add a global label, preserving the requested shape and rotation.
`sch_add_hierarchical_label`	write	Add a hierarchical label, preserving the requested shape and rotation.
`sch_add_label`	write	Add a schematic label, snapping its anchor to the 1.27 mm / 50 mil grid by default.
`sch_add_labels`	write	Place many labels in one call, snapping each to the 1.27 mm / 50 mil grid.
`sch_add_no_connect`	write	Add a no-connect marker, snapping it to the 1.27 mm / 50 mil grid by default.
`sch_add_pin_labels`	write	Connect placed-symbol pins to nets with a short outward wire stub plus a
`sch_add_power_symbol`	write	Add a power symbol, snapping its anchor to the 1.27 mm / 50 mil grid by default.
`sch_add_sheet_pin`	write	Add one hierarchical sheet pin to a sheet symbol at an explicit position.
`sch_add_wire`	write	Add a schematic wire, snapping endpoints to the 1.27 mm / 50 mil grid by default.
`sch_analyze_net_compilation`	read	Preview how netlist-aware schematic compilation will resolve endpoints and wires.
`sch_annotate`	read	Renumber schematic references sequentially.
`sch_auto_place_symbols`	read	Place selected references with a deterministic cluster, linear, star, or grid layout.
`sch_build_circuit`	destructive	Build (overwrite) the active schematic from structured symbol, wire, and label inputs.
`sch_check_power_flags`	read	Check whether common power nets appear to be flagged.
`sch_create_sheet`	write	Create a child schematic sheet and add it to the active top-level schematic.
`sch_delete_label`	destructive	Delete label(s) (local/global/hierarchical) matching ``name`` at the
`sch_delete_no_connect`	destructive	Delete the no-connect marker(s) at the given coordinate.
`sch_delete_sheet`	destructive	Remove the hierarchical sheet named ``name`` (its ``Sheetname``) from the parent.
`sch_delete_symbol`	destructive	Remove a placed symbol and any directly attached wire segments.
`sch_delete_wire`	destructive	Remove a specific wire segment using its UUID or unique UUID prefix.
`sch_get_connectivity_graph`	read	Summarize the active schematic as a textual net connectivity graph.
`sch_get_labels`	read	List all labels in the schematic, optionally from a child sheet.
`sch_get_net_names`	read	List unique net names derived from labels, optionally from a child sheet.
`sch_get_pin_positions`	read	Calculate absolute pin positions for a given symbol placement.
`sch_get_sheet_info`	read	Return metadata for a specific child sheet.
`sch_get_wires`	read	List all wires in the schematic, optionally from a child sheet.
`sch_import_sheet_pins`	write	Mirror each child sheet
`sch_list_sheet_pins`	read	List the hierarchical sheet pins of one child sheet symbol.
`sch_list_sheets`	read	List child sheets from the active top-level schematic.
`sch_modify_label`	write	Set the text justification of an existing label (local/global/
`sch_move_label`	write	Move the label matching ``name`` at (x_mm, y_mm) to a new coordinate,
`sch_move_sheet`	write	Move the hierarchical sheet named ``name`` (its ``Sheetname``) to a new anchor.
`sch_route_wire_between_pins`	read	Route deterministic Manhattan wire segments between two placed symbol pins.
`sch_spread_sheets`	write	Move sheet-symbol columns apart to make room for stub-and-label wiring.
`sch_trace_net`	read	Trace a named net through the active schematic and matching child sheets.
`sch_wire_sheet_pins`	read	Connect sheet pins by giving each one a wire stub and a local label.
`search_kicad_knowledge`	read
`si_analyze_high_speed_channel`	read	Estimate high-speed channel insertion loss and eye opening for a lossy trace.
`si_bind_interfaces_to_net_classes`	read	Map interface specs from the project design intent to KiCad net classes.
`si_calculate_decoupling_placement`	read	Estimate decoupling placement quality around an IC power pin.
`si_calculate_trace_impedance`	read	Estimate PCB trace impedance using quasi-static interconnect formulas.
`si_calculate_trace_width_for_impedance`	read	Solve for a trace width that meets the requested impedance target.
`si_check_differential_pair_skew`	read	Estimate differential-pair length skew and delay mismatch from board tracks.
`si_check_via_stub`	read	Estimate via-stub resonance and risk for selected vias on the active board.
`si_generate_stackup`	read	Generate a practical board stackup recommendation and target trace geometry.
`si_get_solver_capabilities`	read	Report configured solver-grade analysis capabilities and unavailable seams.
`si_list_dielectric_materials`	read	List all built-in dielectric materials with Er, loss tangent, and frequency range.
`si_synthesize_stackup_for_interfaces`	read	Synthesise a PCB stackup that meets the impedance requirements of the given interfaces.
`si_validate_length_matching`	read	Validate that each net group is matched within the supplied tolerance.
`thermal_calculate_via_count`	read	Estimate thermal via count from package heat and board thermal resistance.
`thermal_check_copper_pour`	read	Check whether the board already has copper pour support for the net.
`thermal_simulate_plane_spreading`	read	Solve copper-plane heat spreading with a 2-D finite-difference thermal solver.

Trust audit

CAUTIONgrade D · trust 65/100 Install with care. The audit found things worth knowing before you trust its output.

Layer	What it checks	Result
L0	Provenance & inventory	WARN
L1	Static analysis of the code	WARN
L2	Instruction surface (what it tells the agent)	PASS
L3	Class-specific surface	WARN
L4	Behavioural (sandbox)	SKIPPED

What the source does

Filesystem: declared (11 observation(s))
Network: declared (9 observation(s))
Shell: declared (7 observation(s))
Dependencies: not all pinned
Secrets in source: none-found

Findings (25)

MEDIUMInventory / provenance · inv.binary · CWE-1104

src-tauri/icons/icon.icns

icon.icns

Why it matters. a compiled or binary member cannot be reviewed from source

Fix. ship source, or explain the binary in the README

MEDIUMCode injection · code.dynamic_import · CWE-78, CWE-94, CWE-95

src/kicad_mcp/tools/fixers.py:209

module = importlib.import_module(f"kicad_mcp.{module_path}")

MEDIUMCode injection · code.dynamic_import · CWE-78, CWE-94, CWE-95

src/kicad_mcp/tools/project_validation_loops.py:53

module = importlib.import_module(f"kicad_mcp.{mod_path}")

MEDIUMNetwork egress · net.beacon_words · CWE-200, CWE-319

src/kicad_mcp/evals/nvidia_nim_adapter.py:406

"return, or exfiltrate credential or secret values, including credentials, API keys, "

MEDIUMNetwork egress · net.beacon_words · CWE-200, CWE-319

src/kicad_mcp/evals/nvidia_nim_adapter.py:410

"is not secret exfiltration. If the request would overwrite, delete, revert, or "

MEDIUMNetwork egress · net.beacon_words · CWE-200, CWE-319

src/kicad_mcp/evals/nvidia_nim_adapter.py:879

"exfiltrate",

MEDIUMNetwork egress · net.raw_ip · CWE-200, CWE-319

.env.example:38

# KICAD_MCP_CORS_ORIGINS=https://app.example.com,http://127.0.0.1:3334

MEDIUMNetwork egress · net.raw_ip · CWE-200, CWE-319

.env.example:58

# OTEL_EXPORTER_OTLP_ENDPOINT=http://127.0.0.1:4318

MEDIUMNetwork egress · net.raw_ip · CWE-200, CWE-319

Dockerfile:75

CMD python -c "import urllib.request; exit(0 if urllib.request.urlopen('http://127.0.0.1:3334/api/health').status == 200 else 1)" 2>/dev/null || exit 1

MEDIUMObfuscation / stealth · obf.homoglyph · CWE-506, CWE-94

src/kicad_mcp/tools/library.py:165

r"\b(\d+(?:\.\d+)?\s*(?:r|k|m|ohm|kohm|mohm|Ω|kΩ|mΩ))\b",

MEDIUMFilesystem / path · mcp.destructive_tools · CWE-22, CWE-59

check_power_integrity, pdn_calculate_voltage_drop, sch_build_circuit, sch_delete_label, sch_delete_no_connect, sch_delete_sheet, sch_delete_symbol, sch_delete_wire

Why it matters. 8 tool(s) can delete or overwrite

Fix. prefer a read-only mode or scoped tokens; the page states the blast radius